Toshiba TLCS-900/L1 Series Manual page 244

Original cmos 16-bit microcontroller
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(4) Chip select/wait control (1/2)
Symbol
Name
Address
C0H
Block 0
CS/WAIT
B0CS
control
(Prohibit
register
RMW)
C1H
Block 1
CS/WAIT
B1CS
control
register
(Prohibit
RMW)
C2H
Block 2
CS/WAIT
B2CS
control
register
(Prohibit
RMW)
C3H
Block 3
CS/WAIT
B3CS
control
register
(Prohibit
RMW)
C7H
External
CS/WAIT
BEXCS
control
register
(Prohibit
RMW)
Memory
start
MSAR0
C8H
address
register 0
Memory
address
MAMR0
C9H
mask
register 0
Memory
start
MSAR1
CAH
address
register 1
Memory
address
MAMR1
CBH
mask
register 1
7
6
5
B0E
B0OM1
W
W
0
0
0: Disable
00: ROM/SRAM
1: Enable
01:
10:
Reserved
11:
B1E
B1OM1
W
W
0
0
0: Disable
00: ROM/SRAM
1: Enable
01:
10:
Reserved
11:
B2E
B2M
B2OM1
W
W
W
1
0
0
0: Disable
0: 16 M
00: ROM/SRAM
1: Enable
area
01:
1: Area
10:
Reserved
set
11:
B3E
B3OM1
W
W
0
0
0: Disable
00: ROM/SRAM
1: Enable
01:
10:
Reserved
11:
S23
S22
S21
1
1
1
V20
V19
V18
1
1
1
CS0 area size
S23
S22
S21
1
1
1
V21
V20
V19
1
1
1
CS1 area size
91C824-242
4
3
2
B0OM0
B0BUS
B0W2
W
W
W
0
0
0
Data bus
000: 2 waits
width
001: 1 wait
010: (1 + N) waits 110: 4 waits
0: 16 bits
1: 8 bits
011: 0 waits
B1OM0
B1BUS
B1W2
W
W
W
0
0
0
Data bus
000: 2 waits
width
001: 1 wait
010: (1 + N) waits 110: 4 waits
0: 16 bits
1: 8 bits
011: 0 waits
B2OM0
B2BUS
B2W2
W
W
W
0
0
0
Data bus
000: 2 waits
width
001: 1 wait
010: (1 + N) waits 110: 4 waits
0: 16 bits
1: 8 bits
011: 0 waits
B3OM0
B3BUS
B3W2
W
W
W
0
0
0
Data bus
000: 2 waits
width
001: 1 wait
010: (1 + N) waits 110: 4 waits
0: 16 bits
1: 8 bits
011: 0 waits
BEXBUS
BEXW2
W
W
0
0
Data bus
000: 2 waits
width
001: 1 wait
010: (1 + N) waits 110: 4 waits
0: 16 bits
1: 8 bits
011: 0 waits
S20
S19
S18
R/W
1
1
1
Start address A23 to A16
V17
V16
V15
R/W
1
1
1
0: enable to address comparison
S20
S19
S18
R/W
1
1
1
Start address A23 to A16
V18
V17
V16
R/W
1
1
1
0: Enable to address comparison
TMP91C824
1
0
B0W1
B0W0
W
W
0
0
100: Reserved
101: 3 waits
111: 8 waits
B1W1
B1W0
W
W
0
0
100: Reserved
101: 3 waits
111: 8 waits
B2W1
B2W0
W
W
0
0
100: Reserved
101: 3 waits
111: 8 waits
B3W1
B3W0
W
W
0
0
100: Reserved
101: 3 waits
111: 8 waits
BEXW1
BEXW0
W
W
0
0
100: Reserved
101: 3 waits
111: 8 waits
S17
S16
1
1
V14 to V9
V8
1
1
S17
S16
1
1
V15 to V9
V8
1
2008-02-20

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