Table of Contents
Advertisement
3.7.3
SFRs
7
Bit symbol
TA0RDE
TA01RUN
(0100H)
Read/Write
R/W
After reset
0
Function
Double
buffer
0: Disable
1: Enable
TA0REG double buffer control
0
1
Note: The values of bits 4, 5, 6 of TA01RUN are undefined when read.
7
TA23RUN
Bit symbol
TA2RDE
(0108H)
Read/Write
R/W
After reset
0
Function
Double
buffer
0: Disable
1: Enable
TA2REG double buffer control
0
1
Note: The values of bits 4, 5, 6 of TA23RUN are undefined when read.
TMRA01 Run Register
6
5
Disable
Enable
TMRA23 Run Register
6
5
Disable
Enable
Figure 3.7.4 TMRA Registers
91C824-96
4
3
2
I2TA01
TA01PRUN
R/W
0
0
IDLE2
8-bit timer run/stop control
0: Stop
0: Stop and clear
1: Operate
1: Run (Count up)
I2TA01:
Operation in IDLE2 mode
TA01PRUN: Run prescaler
TA1RUN:
Run TMRA1
TA0RUN:
Run TMRA0
4
3
2
I2TA23
TA23PRUN
R/W
0
0
IDLE2
8-bit timer run/stop control
0: Stop
0: Stop and clear
1: Operate
1: Run (Count up)
I2TA23:
Operation in IDLE2 mode
TA23PRUN: Run prescaler
TA3RUN:
Run TMRA3
TA2RUN:
Run TMRA2
TMP91C824
1
0
TA1RUN
TA0RUN
0
0
Timer run/stop control
0
Stop and clear
1
Run (Count up)
1
0
TA3RUN
TA2RUN
0
0
Timer run/stop control
0
Stop and clear
1
Run (Count up)
2008-02-20
Advertisement
Table of Contents
