Toshiba TLCS-900/L1 Series Manual page 145

a. Transmission
TXD0 and SCLK0 pins respectively each time the CPU writes the data to the
transmission buffer. When all data is output, INTES0<ITX0C> will be set to
generate the INTTX0 interrupt.
Timing to write
transmission data
SCLK0 output
(<SCLKS>=0
Rising edge mode)
SCLK0 output
(<SCLKS>=1
Falling edge mode)
TXD0
ITX0C
(INTTX0
Interrupt request)
Figure 3.9.19 Transmitting Operation in I/O Interface Mode (SCLK0 output mode)
input becomes active after the data has been written to the transmission buffer
by the CPU.
interrupt.
SCLK0input
(<SCLKS> = 0
Rising edge mode)
SCLK0 input
(<SCLKS> = 1
Falling edge mode)
TXD0
ITX0C
(INTTX0
Interrupt request)
Figure 3.9.20 Transmitting Operation in I/O Interface Mode (SCLK0 input mode)
In SCLK output mode 8-bit data and a synchronous clock are output on the
Bit0
In SCLK input mode, 8-bit data is output on the TXD0 pin when the SCLK0
When all data is output, INTES0<ITX0C> will be set to generate INTTX0
Bit0 Bit1
91C824-143
Bit1 Bit6
Bit5 Bit6
TMP91C824
(Internal clock
timing)
Bit7
Bit7
2008-02-20