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In this mode, the value of the register buffer will be shifted into TA0REG if 2
overflow is detected when the TA0REG double buffer is enabled.
Use of the double buffer facilitates the handling of low duty ratio waves.
Match with TA0REG
Up counter
n
2
overflow
TA0REG
(Value to be compared)
Register buffer
Figure 3.7.18 Register Buffer Operation
Example: To output the following PWM waves on the TA1OUT pin at fc = 33MHz:
* Clock state
To achieve a 31.0 µs PWM cycle by setting φT1 = (2
31.0 µs ÷ (2
3
Therefore n should be set to 7.
Since the low-level period is 37.0 µs when φT1 = (2
set the following value for TA0REG:
17.9 µs ÷ (2
3
MSB
7
6
5
4
← –
TA01RUN
X
X
X
← 1
TA01MOD
1
1
0
← 0
TA0REG
1
0
0
← X
TA1FFCR
X
X
X
← X
PBCR
–
–
–
← X
PBFC
–
–
–
← 1
TA01RUN
X
X
X
X: Don't care, −: No change
=
Q
1
Shift into TA0REG
Q
1
Q
2
17.9 µs
31.0 µs
System clock:
Clock gear:
Prescaler clock: f
/fc)s ≈ 128 = 2
n
/fc)s ≈ 74 = 4AH
LSB
3
2
1
0
–
–
–
0
Stop TMRA0 and clear it to 0.
Select 8-bit PWM mode (Cycle: 2
–
–
0
1
input clock.
1
0
1
0
Write 4AH.
1
0
1
X
Clear TA1FF to 0, enable the inversion and double buffer.
–
–
1
–
Set PB1 and the TA1OUT pin.
–
–
1
X
–
1
–
1
Start TMRA0 counting.
91C824-110
TMP91C824
=
Up counter
Q
2
Q
2
Q
3
TA0REG (Register buffer)
write
High frequency (fc)
1 (fc)
FPH
/fc)s (at fc = 33 MHz):
3
/fc)s,
3
7
) and select φT1 as the
2008-02-20
n
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