Toshiba TLCS-900/L1 Series Manual page 15

The clock operating modes are as follows: (a) Single clock mode (X1, X2 pins only), (b) Dual
clock mode (X1, X2, XT1 and XT2 pins) and (c) Triple clock mode (The X1, X2, XT1 and XT2
pins and DFM).
Figure 3.3.1 shows a transition figure.
IDLE2 mode
(I/O operate)
IDLE1 mode
(Operate only oscillator)
IDLE2 mode
(I/O operate)
IDLE1 mode
(Operate only oscillator)
IDLE2 mode
(I/O operate)
IDLE1 mode
(Operate only oscillator)
IDLE2 mode
(I/O operate)
IDLE1 mode
(Operate only oscillator)
Instruction
IDLE2 mode
Interrupt
(I/O operate)
IDLE1 mode
Instruction
(Operate oscillator and DFM)
Interrupt
Note 1: It's prohiibited to control DFM in SLOW mode when shifting from SLOW mode to NORMAL mode
with use of DFM. (DFM start up/stop/change write to DFMCR0<ACT1:0> register)
Note 2: If you shift from NORMAL mode with use of DFM to NORMAL mode, the instructions should be
separated into two procedures as below. Change CPU clock → Stop DFM circuit.
Note 3: It's prohibited to shift from NORMAL mode with use of DFM to STOP mode directly. You should
set NORMAL mode once, and then shift to STOP mode. (You should stop high-frequency
oscillator after you stop DFM.)
Note: The clock frequency input from the X1 and X2 pins is called f
from the XT1 and XT2 pins is called fs. The clock frequency selected by SYSCR1<SYSCK> is
called the system clock f
one cycle of f
SYS
Reset
(f
OSCH
Instruction
Interrupt
NORMAL mode
Instruction
(f /gear value/2)
OSCH
Interrupt
(a) Single clock mode transition figure
Reset
(f
OSCH
Instruction
Interrupt
NORMAL
Instruction
(f /gear value/2)
OSCH
Interrupt
Instruction
Interrupt
SLOW mode
Instruction
(fs/2)
Interrupt
(b) Dual clock mode transition fiigure
Reset
(f
OSCH
Instruction
Interrupt
NORMAL
Instruction
(f /gear value/2)
OSCH
Interrupt
(Note)
STOP mode
(Stops all circuits)
Instruction
Instruction
Instruction
NORMAL mode
(4 × f OSCH /gear
Note
value/2)
Using DMF
(c) Triple clock mode trasision Figure
Figure 3.3.1 System Clock Block Diagram
. The system clock f
FPH
is called one state.
91C824-13
/32)
Release reset
Instruction
Interrupt
/32)
Release reset
mode
Instruction
Interrupt
/32)
Release reset
mode
Instruction
Interrupt
Instruction
Interrupt
SLOW mode
(fs/2)
Instruction
and the clock frequency input
OSCH
is defined as the divided clock of f
SYS
TMP91C824
STOP mode
(Stops all circuits)
STOP mode
(Stops all circuits)
IDLE2 mode
(I/O operate)
IDLE1 mode
(Operate only oscillator)
, and
FPH
2008-02-20