Toshiba TLCS-900/L1 Series Manual page 113

Select Select
System Prescaler
Clock Clock
<SYSCK> <PRCK1:0>
1 (fs)
00
(f )
FPH
0 (fc)
10
(fc/16 clock)
XXX: Don't care
(5) Settings for each mode
Table 3.7.4 shows the SFR settings for each mode.
Register Name
<Bit Symbol> <TA01M1:0>
Function
8-bit timer × 2 channels
16-bit timer mode
8-bit PPG × 1 channel
8-bit PWM × 1 channel
8-bit Timer × 1 channel
−: Don't care
Table 3.7.3 PWM Cycle
Gear Value
6
2
<GEAR2:0>
φT1 φT4
XXX
15.6 ms 62.5 ms
15.5 µs 62.1 µs
000 (fc)
31.0 µs 124.1 µs
001 (fc/2)
32.1 µs 248.2 µs
010 (fc/4)
124.1 µs 496.5 µs
011 (fc/8)
248.2 µs 993.0 µs
100 (fc/16)
248.2 µs 993.0 µs
XXX
Table 3.7.4 Timer Mode Setting Registers
TA01MOD
<PWM01:00>
Timer Mode PWM Cycle
−
00
−
01
−
10
6 7 8
2 , 2 , 2
11
(01, 10, 11)
−
11
91C824-111
PWM Cycle
7
2
φT16 φT1 φT4 φT16
250 ms 31.3 ms 125 ms 500 ms
248.2 µs 31.0 µs 124.1 µs 496.5 µs
496.5 µs 62.1 µs 248.2 µs 993.0 µs 124.1 µs 496.5 µs
993.0 µs 124.1 µs 496.5 µs 1986 µs
1986 µs 248.2 µs 993.0 µs 3972 µs
3972 µs 496.5 µs 1986 µs 7944 µs
3972 µs 496.5 µs 1986 µs 7944 µs
<TA1CLK1:0> <TA0CLK1:0>
Upper Timer Input Lower Timer
Clock Input Clock
Lower timer match External clock
φT1, φT16, φT256 φT1, φT4, φT16
(00, 01, 10, 11) (00, 01, 10, 11)
External clock
− φT1, φT4, φT16
(00, 01, 10, 11)
External clock
− φT1, φT4, φT16
(00, 01, 10, 11)
External clock
− φT1, φT4, φT16
(00, 01, 10, 11)
φT1, φT16, φT256
−
(01, 10, 11)
TMP91C824
at fc = 33 MHz, fs = 32.768 kHz
8
2
φT1 φT4 φT16
62.5 ms 250 ms 1000 ms
62.1 µs 248.2 µs 993.0 µs
1986 µs
248.2 µs 993.0 µs 3972 µs
496.5 µs 1986 µs 7944 µs
993 µs 3972 µs
15888 µs
993 µs 3972 µs 15888 µs
TA1FFCR
TA1FFIS
Timer F/F Invert Signal
Select
0: Lower timer output
1: Upper timer output
−
−
−
Output disabled
2008-02-20