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3.8.1
Recommendable Memory Map
The recommendation logic address memory map at the time of varieties extension
memory correspondence is shown in Figure 3.8.1. And, a physical-address map is shown
in Figure 3.8.2.
However, when memory area is less than 16 Mbytes and is not expanded, please refer to
section of CS/WAIT controller. Setting of register in MMU is not necessary.
Since it is being fixed, the address of a local area cannot be changed.
Address
Size
Memory map
000000H
1 Mbyte
COMMON0
100000H
1 Mbyte
200000H
2 Mbytes
(COMMON0α
Pin set A case)
400000H
2 Mbytes
600000H
2 Mbytes
COMMON1
800000H
4 Mbytes
C00000H
2 Mbytes
E00000H
2 Mbytes
COMMON2
FFFF00H
256 bytes
Vector area
FFFFFFH
BANK
0 1 2 3 4 5 6 7
LOCAL0
0 1 2 3 4 5 6 7
LOCAL1
0 1 2
LOCAL3
0 1 2 3 4 5 6 7
LOCAL2
Figure 3.8.1 Logical Address Map
91C824-113
(CS/WAIT)
Pin set A
(CS0)
CS0
(
)
CS0
CS0
(
)
CS1
CS1
...
14 15
(CS3)
CS3
EA24
EA25
(
)
CS2
CS2
: Internal area
: Overlapped with COMMON area
TMP91C824
(CS/WAIT)
Pin set B
(
)
CS3
CS3
(
)
CS0
CS0
(
)
CS1
CS1
(
)
CS2
CS2B (BANK0 to BANK3)
CS2C (BANK4 to BANK7)
CS2D (BANK8 to BANK11)
CS2E (BANK12 to BANK15)
(
)
CS2
CS2A
2008-02-20
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