Toshiba TLCS-900/L1 Series Manual page 171

If <MST> = 0 (Slave mode)
b.
In the slave mode the TMP91C824 operates either in normal slave mode or in
slave mode after losing arbitration.
In the slave mode, an INTSBI interrupt request occurs when the TMP91C824
receives a slave address or a GENERAL CALL from the master device, or when a
GENERAL CALL is received and data transfer is complete, or after matching
received address. In the master mode, the TMP91C824 operates in a slave mode
if it losing arbitration. An INTSBI interrupt request occurs when a word data
transfer terminates after losing arbitration. When an INTSBI interrupt request
occurs the <PIN> is cleared to 0 and the SCL pin is pulled down to the low level.
Either reading/writing from/to the SBI0DBR or setting the <PIN> to 1 will
release the SCL pin after taking t
Check the SBI0SR<AL>, <TRX>, <AAS>, and <AD0> and implements
processes according to conditions listed in the next table.
<TRX> <AL> <AAS> <AD0>
1 1 1
0 1
0
0 1 1
0
0 1
0
LOW
Table 3.10.1 Operation in the Slave Mode
Conditions
0 The TMP91C824 loses arbitration when
transmitting a slave address and
receives a slave address for which the
value of the direction bit sent from
another master is 1.
0 In salve receiver mode the TMP91C824
receives a slave address for which the
value of the direction bit sent from the
master is 1.
0 In salve transmitter mode a single word
of is transmitted.
Set BC<2:0> to the number of bits in a
word.
1/0 The TMP91C824 loses arbitration when
transmitting a slave address and
receives a slave address or GENERAL
CALL for which the value of the direction
bit sent from another master is 0.
0 The TMP91C824 loses arbitration when
transmitting a slave address or data and
terminates word data transfer.
1/0 In slave receiver mode the TMP91C824
receives a slave address or GENERAL
CALL for which the value of the direction
bit sent from the master is 0.
1/0 In slave receiver mode the TMP91C824
terminates receiving word data.
91C824-169
time.
Process
Set the number of bits a word in
<BC2:0> and write the transmitted data
to SBI0DBR
Check the <LRB> setting. If <LRB> is
set to 1, set <PIN> to 1 since the
receiver win no request the data which
follows. Then, cleat <TRX> to 0 to
release the bus. If <LRB> is cleared to 0
of and write the transmitted data to
SBI0DBR since the receiver requests
next data.
Read the SBI0DBR for setting the <PIN>
to 1 (Reading dummy data) or set the
<PIN> to 1.
Set BC<2:0> to the number of bits in a
word and read the received data from
SBI0DBR.
TMP91C824
2008-02-20