Toshiba H1 Series Data Book page 278

32bit micro controller tlcs-900/h1 series
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Bit symbol
TA4RDE
TA45RUN
Read/Write
(1110H)
After Reset
Function
Double
buffer
0: Disable
1: Enable
TA4REG double buffer control
0
1
Note: The values of bits 4 to 6 of TA45RUN are "1" when read.
Bit symbol
TA6RDE
TA67RUN
(1118H)
Read/Write
After Reset
Function
Double
buffer
0: Disable
1: Enable
TA6REG double buffer control
0
1
Note: The values of bits 4 to 6 of TA67RUN are "1" when read.
TMRA45 RUN Register
7
6
5
R/W
0
Disable
Enable
TMRA67RUN Register
7
6
5
R/W
0
Disable
enable
Figure 3.12.7 Register for TMRA (2)
92CZ26A-275
4
3
2
I2TA45
TA45PRUN
0
0
TMRA45
In IDLE2
prescaler
mode
0: Stop
0: Stop and clear
1: Operate
1: Run (Count up)
4
3
2
I2TA67
TA67PRUN
0
0
TMRA67
In IDLE2
prescaler
mode
0: Stop
0: Stop and clear
1: Operate
1: Run (Count up)
TMP92CZ26A
1
0
TA5RUN
TA4RUN
R/W
0
0
Up counter
Up counter
(UC5)
(UC4)
Count control
0
Stop and clear
1
Run (Count up)
1
0
TA7RUN
TA6RUN
R/W
0
0
Up counter
Up counter
(UC7)
(UC6)
Count control
0
Stop and clear
1
Run (Count up)

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