Toshiba H1 Series Data Book page 626

• Exiting the Power Cut Mode
The Power Cut Mode can be exited by external or internal interruption. (It inhibits to exit
the Power Cut Mode by reset when DVCC1A is cut off. Reset must be asserted after supplying
power to DVCC1A and waiting for its voltage to fully stabilize.) The interrupts that can be
used to exit the Power Cut Mode are RTC interrupt, INT0 to INT7 (TSI interrupt) and
INTKEY interrupt.
Source
External
When an interrupt request is accepted, the power management signals (PWE) changes from
"0" to "1" and power is supplied to each block that has been cut off. After the warm-up time set
in PMCCTL<WUTM1:0> has elapsed, HOT_RESET is automatically released and the CPU
starts up from the internal boot ROM regardless of the external AM pin state. All external
ports retain the state before entering the Power Cut Mode except for the PnDR setting which
is released upon release of HOT_RESET.
* Output pin Hi-Z state
* Input pin input gate OFF
The internal boot ROM first checks the PMCCTL <PCM_ON> bit in the PMC. If this bit is
set to "1", execution jumps to address 46000H in the internal RAM before making all initial
settings. The <PCM_ON> bit in the PMC is cleared to "0" by software.
Note 1: The interrupt that released the Power Cut Mode, whichever it is, does not activate any interrupt operation. Nor
is it possible to identify which interrupt released the Power Cut Mode.
Note 2: Once the PMCCTL<PCM_ON> bit is set to "1", it remains in this state. To re-enter the Power Cut Mode, it is
necessary to set this bit to "0" once and then to "1" again. At this time, a minimum of 31 us must be inserted
between setting <PCM_ON> to "0" and "1".
Note 3: Since the Power Cut Mode is exited using the boot ROM, some settings must be made by software. Be
careful about this point.
BROMCR Bit symbol
(016CH)
Read/Write
After reset
Function
Table 3.25.1 Wake-up triggers
Symbol
RTC INTRTC
INT0
INT1
INT2
INT3
INT4
INT5
INT6
INT7
Key INTKEY
→
→
7 6 5
92CZ26A-623
Only support "Rising Edge"
Only support "Rising Edge"
Only support "Rising Edge"
Only support "Rising Edge"
When TSI, need to disable de-bounce circuit
Only support "Rising Edge"
Only support "Rising Edge"
Only support "Rising Edge"
Only support "Rising Edge"
Only support "Falling Edge"
"1" or "0" output
Input pin input gate ON
4 3
TMP92CZ26A
Note
KI0~KI8
2 1
CSDIS ROMLESS
R/W
1 0
NAND Flash Boot ROM Vector
area CS 0: Used address
output 1: Not used conversion
0: Enable 0: Disable
1: Disable 1: Enable
0
VACE
1