Toshiba H1 Series Data Book page 81

(1) Interrupt priority setting registers
Symbol Name
INT0
INTE0
enable
INT1 & INT2
INTE12
enable
INT3 & INT4
INTE34
enable
INT5 & INT6
INTE56
enable
INT7
INTE7
enable
INTTA0 &
INTETA01 INTTA1
enable
INTTA2 &
INTETA23 INTTA3
enable
INTTA4 &
INTETA45 INTTA5
enable
INTTA6 &
INTETA67 INTTA7
enable
Interrupt request flag
Address 7 6
− −
F0H
R
Always write "0".
I2C I2M2
D0H
R
0 0
I4C I4M2
D1H
R
0 0
I6C I6M2
D2H
R
0 0
− −
D3H
R
Always write "0".
INTTA1 (TMRA1)
ITA1C ITA1M2
D4H
R
0 0
INTTA3 (TMRA3)
ITA3C ITA3M2
D5H
R
0 0
INTTA5 (TMRA5)
ITA5C ITA5M2
D6H
R
0 0
INTTA7 (TMRA7)
ITA7C ITA7M2
D7H
R
0 0
lxxM2
0
0
0
0
1
1
1
1
92CZ26A-78
5 4
−
− −
R/W
INT2
I2M1 I2M0
R/W
0 0
INT4
I4M1 I4M0
R/W
0 0
INT6
I6M1 I6M0
R/W
0 0
−
− −
R/W
ITA1M1 ITA1M0 ITA0C
R/W
0 0
ITA3M1 ITA3M0 ITA2C
R/W
0 0
ITA5M1 ITA5M0 ITA4C
R/W
0 0
ITA7M1 ITA7M0 ITA6C
R/W
0 0
lxxM1 lxxM0
0 0 Disables interrupt requests
0 1 Sets interrupt priority level to 1
1 0 Sets interrupt priority level to 2
1 1 Sets interrupt priority level to 3
0 0 Sets interrupt priority level to 4
0 1 Sets interrupt priority level to 5
1 0 Sets interrupt priority level to 6
1 1 Disables interrupt requests
TMP92CZ26A
3 2 1
INT0
I0C I0M2 I0M1
R R/W
0 0 0
INT1
I1C I1M2 I1M1
R R/W
0 0 0
INT3
I3C I3M2 I3M1
R R/W
0 0 0
INT5
I5C I5M2 I5M1
R R/W
0 0 0
INT7
I7C I7M2 I7M1
R R/W
0 0 0
INTTA0 (TMRA0)
ITA0M2 ITA0M1
R R/W
0 0 0
INTTA2 (TMRA2)
ITA2M2 ITA2M1
R R/W
0 0 0
INTTA4 (TMRA4)
ITA4M2 ITA4M1
R R/W
0 0 0
INTTA6 (TMRA6)
ITA6M2 ITA6M1
R R/W
0 0 0
Function (Write)
0
I0M0
0
I1M0
0
I3M0
0
I5M0
0
I7M0
0
ITA0M0
0
ITA2M0
0
ITA4M0
0
ITA6M0
0