Toshiba H1 Series Data Book page 312

(3) 16-bit programmable pulse generation (PPG) output mode
Square wave pulses can be generated at any frequency and duty ratio. The output
pulse may be either low active or high active.
The PPG mode is obtained by inversion of the timer flip-flop TB0FF0 that is to be
enabled by the match of the up counter UC10 with timer register TB0RG0H/L or
TB0RG1H/L and to be output to TB0OUT0. In this mode the following conditions
must be satisfied.
(Value set in TB0RG0) < (Value set in TB0RG1)
Match with TB0RG0
(INTTB00 interrupt)
Match with TB0RG1
(INTTB01 interrupt)
TB0OUT0 pin
Figure 3.13.9 Programmable Pulse Generation (PPG) Output Waveforms
When the TB0RG0H/L double buffer is enabled in this mode, the value of register
buffer 10 will be shifted into TB0RG0H/L at match with TB0RG1H/L. This feature
facilitates the handling of low-duty waves.
Match with TB0RG0H/L
Match with TB0RG1H/L
TB0RG0H/L
(Value to be compared)
Register buffer 10
Figure 3.13.10 Operation of double buffer
Note: The values that can be set in TBxRGx range from 0001h to 0000h (equivalent to 10000h). If the maximum
value 000h is set, the match-detect signal goes active when the up-counter overflows.
Up conter = Q
1
Q
1
Q
2
92CZ26A-309
Up counter = Q
Shift into the TB0RG1H/L
Q
2
Write into the TB0RG0H/L
TMP92CZ26A
2
Q
3