Toshiba H1 Series Data Book page 703

32bit micro controller tlcs-900/h1 series
Table of Contents

Advertisement

(6) LCD controller (2/6)
Symbol
Name
Address
LCD
LCDCTL1
control1
0286H
register
LCD
LCDCTL2
control2
0287H
register
LHSYNC
Pulse
LCDHSP
028AH
register
LHSYNC
LCDHSP
Pulse
028BH
register
LVSYNC
LCDVSP
Pulse
028CH
register
LVSYNC
LCDVSP
Pulse
028DH
register
LVSYNC
Pre Pulse
028EH
LCDPRVSP
register
LHSYNC
Delay
028FH
LCDHSDLY
register
LLOAD
Delay
0290H
LCDLDDLY
register
7
6
5
LCP0P
LHSP
LVSP
R/W
R/W
R/W
1
0
1
LCP0
LHSYNC
LVSYNC
phase
phase
phase
0:Rising
0:Rising
0:Rising
1:Falling
1: Falling
1: Falling
LGOE2P
LGOE1P
LGOE0P
R/W
0
0
0
LGOE2
LGOE1
LGOE0
phase
phase
phase
0: Rising
0: Rising
0: Rising
1: Falling
1: Falling
1: Falling
LH7
LH6
LH5
0
0
LH15
LH14
LH13
0
0
LVP7
LVP6
LVP5
0
0
PLV6
PLV5
0
0
HSD6
HSD5
0
0
PDT
LDD6
LDD5
R/W
0
0
0
Data output
timing
0: Sync with
LLOAD
1: 1 clock
later than
LLOAD
92CZ26A-700
4
3
LLDP
R/W
0
LLOAD
phase
0:Rising
1: Falling
LH4
LH3
W
0
0
0
LHSYNC period (bits 7-0)
LH12
LH11
W
0
0
0
LHSYNC period (bits 15-8)
LVP4
LVP3
W
0
0
0
LVSYNC period (bits 7-0)
PLV4
PLV3
W
0
0
Front dummy LVSYNC (bits 6-0)
HSD4
HSD3
W
0
0
LHSYNC delay (bits 6-0)
LDD4
LDD3
W
0
0
LLOAD delay (bits 6-0)
TMP92CZ26A
2
1
0
LVSW1
LVSW0
R/W
R/W
0
0
LVSYNC
enable time control
00: 1 clock of LHSYNC
01: 2 clocks of LHSYNC
10: 3 clocks of LHSYNC
11: Reserved
LH2
LH1
LH0
0
0
0
LH10
LH9
LH8
0
0
0
LVP2
LVP1
LVP0
0
0
0
LVP9
LVP8
W
0
0
LVSYNC period
(bits 9-8)
PLV2
PLV1
PLV0
0
0
0
HSD2
HSD1
HSD0
0
0
0
LDD2
LDD1
LDD0
0
0
0

Advertisement

Table of Contents
loading

This manual is also suitable for:

Tlcs-900Tmp92cz26axbg

Table of Contents