Buffering - Hitachi F-ZTAT H8/3039 Series Hardware Manual

Single-chip microcomputer
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8.4.8 Buffering

Buffering operates differently depending on whether a general register is an output compare
register or an input capture register, with further differences in reset-synchronized PWM mode and
complementary PWM mode. Buffering is available only in channels 3 and 4. Buffering operations
under the conditions mentioned above are described next.
• General register used for output compare
The buffer register value is transferred to the general register at compare match. See
figure 8-46.
BR
• General register used for input capture
The TCNT value is transferred to the general register at input capture. The previous general
register value is transferred to the buffer register.
See figure 8-47.
Input capture signal
BR
Compare match signal
GR
Figure 8-46 Compare Match Buffering
Figure 8-47 Input Capture Buffering
Comparator
GR
TCNT
TCNT
257

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