Hitachi F-ZTAT H8/3039 Series Hardware Manual page 57

Single-chip microcomputer
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Table 2-13 Effective Address Calculation
Addressing Mode and
No.
Instruction Format
1
Register direct (Rn)
op
rm rn
2
Register indirect (@ERn)
op
r
3
Register indirect with displacement
@(d:16, ERn)/@(d:24, ERn)
op
r
disp
Register indirect with post-increment
4
or pre-decrement
Register indirect with post-increment
@ERn+
op
r
Register indirect with pre-decrement
@–ERn
op
r
Effective Address Calculation
31
General register contents
31
General register contents
Sign extension
disp
31
General register contents
1, 2, or 4
31
General register contents
1, 2, or 4
1 for a byte operand, 2 for a word
operand, 4 for a longword operand
Effective Address
Operand is general
register contents
0
23
0
23
0
23
0
23
0
0
0
0

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