Hitachi F-ZTAT H8/3039 Series Hardware Manual page 45

Table 2-4 Arithmetic Operation Instructions (cont)
Instruction Size*
DIVXU B/W
DIVXS B/W
CMP B/W/L
NEG B/W/L
EXTS W/L
EXTU W/L
Note: * Size refers to the operand size.
B: Byte
W: Word
L: Longword
32
Function
Rd ÷ Rs → Rd
Performs unsigned division on data in two general registers: either 16
bits ÷ 8 bits → 8-bit quotient and 8-bit remainder or 32 bits ÷ 16 bits →
16-bit quotient and 16-bit remainder.
Rd ÷ Rs → Rd
Performs signed division on data in two general registers: either 16
bits ÷ 8 bits → 8-bit quotient and 8-bit remainder, or 32 bits ÷ 16 bits
→ 16-bit quotient and 16-bit remainder.
Rd – Rs, Rd – #IMM
Compares data in a general register with data in another general
register or with immediate data, and sets CCR according to the result.
0 – Rd → Rd
Takes the two's complement (arithmetic complement) of data in a
general register.
Rd (sign extension) → Rd
Extends byte data in the lower 8 bits of a 16-bit register to word data,
or extends word data in the lower 16 bits of a 32-bit register to
longword data, by extending the sign bit.
Rd (zero extension) → Rd
Extends byte data in the lower 8 bits of a 16-bit register to word data,
or extends word data in the lower 16 bits of a 32-bit register to
longword data, by padding with zeros.