Hitachi F-ZTAT H8/3039 Series Hardware Manual page 99

Single-chip microcomputer
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Bit 7—Priority Level A7 (IPRA7): Selects the priority level of IRQ0 interrupt requests.
Bit7
IPRA7
Description
0
IRQ0 interrupt requests have priority level 0 (low priority)
1
IRQ0 interrupt requests have priority level 1 (high priority)
Bit 6—Priority Level A6 (IPRA6): Selects the priority level of IRQ1 interrupt requests.
Bit6
IPRA6
Description
0
IRQ1 interrupt requests have priority level 0 (low priority)
1
IRQ1 interrupt requests have priority level 1 (high priority)
Bit 5—Reserved bit: This bit can be written and read, but it does not affect interrupt priority.
Bit 4—Priority Level A4 (IPRA4): Selects the priority level of IRQ
requests.
Bit4
IPRA4
Description
0
IRQ
, IRQ
4
1
IRQ
, IRQ
4
Bit 3—Priority Level A3 (IPRA3): Selects the priority level of WTD interrupt requests.
Bit3
IPRA3
Description
0
WDT interrupt requests have priority level 0 (low priority)
1
WDT interrupt requests have priority level 1 (high priority)
Bit 2—Priority Level A2 (IPRA2): Selects the priority level of ITU channel 0 interrupt requests.
Bit2
IPRA2
Description
0
ITU channel 0 interrupt requests have priority level 0 (low priority)
1
ITU channel 0 interrupt requests have priority level 1 (high priority)
interrupt requests have priority level 0 (low priority)
5
interrupt requests have priority level 1 (high priority)
5
(Initial value)
(Initial value)
and IRQ
interrupt
4
5
(Initial value)
(Initial value)
(Initial value)
87

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F-ztat h8/3039F-ztat h8/3038F-ztat h8/3037F-ztat h8/3036

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