Flash Memory Prom Mode; Prom Mode Setting; Memory Map - Hitachi F-ZTAT H8/3039 Series Hardware Manual

Single-chip microcomputer
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Notes on use of the RAM emulation function
(1) Notes on flash write enable (FWE) high/low
Care is necessary to prevent erroneous programming/erasing at FWE=high/low, the same as in
the on-board programming mode. To prevent erroneous programming and erasing due to
program runaway, etc., during FWE application, in particular, the watchdog timer should be
set when the P, or E bit is set to 1 in FLMCR, even while the emulation function is being used.
For more information, see section 15.9, Notes on Flash Memory Programming/Erasing.
(2) NMI input disable conditions
When the P and E bits in FLMCR are set, NMI input is disabled, the same as normal
program/erase even when using the emulation function.
NMI input is cleared when the P and E bits are reset (including watchdog timer reset), in the
standby mode, when a high level is not applied to FWE, and when the SWE bit in FLMCR is 0
in state in which a high level is input to FWE.
15.8

Flash Memory PROM Mode

15.8.1

PROM Mode Setting

This LSI has a PROM mode, besides an on-board programming mode, as a flash memory
program/erase mode. In the PROM mode, a program can be freely written to the on-chip ROM
using a PROM programmer that supports the Hitachi 128kbytes flash memory on-chip
microcomputer device type.
For notes on PROM mode use, see sections 15.8.9, Notes on Memory Programming and 15.9,
Notes on Flash Memory Programming/Erasing.
15.8.2

Memory Map

Figure 15-15 shows the PROM mode memory map.
Address in
This LSI
MCU mode
H'00000
On-chip ROM
area
H'1FFFF
Figure 15-15 PROM Mode Memory Map
Address in
PROM mode
H'00000
H'1FFFF
471

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