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SSR—Serial Status Register
Bit
Initial value
Read/Write
Transmit end
0
1
Framing error
0
[Clearing conditions]
Reset or transition to standby mode.
Read FER when FER = 1, then write 0
in FER.
1
[Setting condition]
Framing error (stop bit is 0)
Receive data register full
0
[Clearing conditions]
Reset or transition to standby mode.
Read RDRF when RDRF = 1, then write 0 in
RDRF.
1
[Setting condition]
Serial data is received normally and transferred
from RSR to RDR
Transmit data register empty
0
[Clearing conditions]
Read TDRE when TDRE = 1, then write 0 in TDRE.
1
[Setting conditions]
Reset or transition to standby mode.
TE is 0 in SCR
Data is transferred from TDR to TSR, enabling new
data to be written in TDR.
Note: * Only 0 can be written to clear the flag.
634
7
6
TDRE
RDRF
1
0
R/(W)
*
R/(W)
*
Multiprocessor bit
0
1
[Clearing conditions]
Read TDRE when TDRE = 1, then write 0 in TDRE.
[Setting conditions]
Reset or transition to standby mode.
TE is cleared to 0 in SCR.
TDRE is 1 when last bit of serial character is transmitted.
5
4
ORER
FER
0
0
R/(W)
*
R/(W)
*
Multiprocessor bit value in
receive data is 0
Multiprocessor bit value in
receive data is 1
Parity error
0
[Clearing conditions]
Reset or transition to standby mode.
Read PER when PER = 1, then write 0 in
PER.
1
[Setting condition]
Parity error: (parity of receive data does not
match parity setting of O/
Overrun error
0
[Clearing conditions]
Reset or transition to standby mode.
Read ORER when ORER = 1, then write 0 in
ORER.
1
[Setting condition]
Overrun error (reception of next serial data
ends when RDRF = 1)
H'B4
3
2
PER
TEND
0
1
R/(W)
*
R
Multiprocessor bit transfer
0
Multiprocessor bit value in
transmit data is 0
1
Multiprocessor bit value in
transmit data is 1
SCI0
1
0
MPB
MPBT
0
0
R
R/W
E
in SMR)
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