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TPCR—TPC Output Control Register
Bit
G3CMS1
Initial value
Read/Write
R/W
Group 0 compare match select 1 and 0
Bit 1
Bit 0
G0CMS1 G0CMS0
0
0
1
1
0
1
Group 1 compare match select 1 and 0
Bit 3
Bit 2
G1CMS1 G1CMS0
0
0
1
1
0
1
Group 2 compare match select 1 and 0
Bit 5
Bit 4
G2CMS1 G2CMS0
0
0
1
1
0
1
Group 3 compare match select 1 and 0
Bit 7
Bit 6
G3CMS1 G3CMS0
0
0
1
1
0
1
Note: * Since this LSI does not have a TP
624
7
6
G3CMS0
G2CMS1
1
1
R/W
R/W
ITU Channel Selected as Output Trigger
TPC output group 0 (TP to TP ) is triggered by compare match in ITU channel 0
TPC output group 0 (TP to TP ) is triggered by compare match in ITU channel 1
TPC output group 0 (TP to TP ) is triggered by compare match in ITU channel 2
TPC output group 0 (TP to TP ) is triggered by compare match in ITU channel 3
ITU Channel Selected as Output Trigger
TPC output group 1 (TP to TP ) is triggered by compare match in ITU channel 0
TPC output group 1 (TP to TP ) is triggered by compare match in ITU channel 1
TPC output group 1 (TP to TP ) is triggered by compare match in ITU channel 2
TPC output group 1 (TP to TP ) is triggered by compare match in ITU channel 3
ITU Channel Selected as Output Trigger
TPC output group 2 (TP to TP ) is triggered by compare match in ITU channel 0
TPC output group 2 (TP to TP ) is triggered by compare match in ITU channel 1
TPC output group 2 (TP to TP ) is triggered by compare match in ITU channel 2
TPC output group 2 (TP to TP ) is triggered by compare match in ITU channel 3
ITU Channel Selected as Output Trigger
TPC output group 3 (TP to TP )
TPC output group 3 (TP to TP )
TPC output group 3 (TP to TP )
TPC output group 3 (TP to TP )
14
5
4
G2CMS0
G1CMS1
1
1
R/W
R/W
3
0
3
0
3
0
3
0
7
4
7
4
7
4
7
4
11
8
11
8
11
8
11
8
is triggered by compare match in ITU channel 0
*
15
12
is triggered by compare match in ITU channel 1
*
15
12
is triggered by compare match in ITU channel 2
*
15
12
is triggered by compare match in ITU channel 3
*
15
12
pin, the TP
signal cannot be output off-chip.
14
H'A1
3
2
G1CMS0
G0CMS1
1
1
R/W
R/W
TPC
1
0
G0CMS0
1
1
R/W
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