Motorola DSP56367 User Manual page 114

24-bit digital signal processor
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Specifications
Parallel Host Interface (HDI08) Timing
Table 3-18 Host Interface (HDI08) Timing (Continued)
No.
333
HCS hold time after data strobe deassertion
Address (AD7–AD0) setup time before HAS deassertion
334
(HMUX=1)
Address (AD7–AD0) hold time after HAS deassertion
335
(HMUX=1)
A10–A8 (HMUX=1), A2–A0 (HMUX=0), HR/W setup time
336
before data strobe assertion
Read
Write
A10–A8 (HMUX=1), A2–A0 (HMUX=0), HR/W hold time
337
after data strobe deassertion
Delay from read data strobe deassertion to host request
338
assertion for "Last Data Register" read
Delay from write data strobe deassertion to host request
339
assertion for "Last Data Register" write
Delay from data strobe assertion to host request deassertion for
340
"Last Data Register" read or write (HROD = 0)
Delay from data strobe assertion to host request deassertion for
341
"Last Data Register" read or write (HROD = 1, open drain Host
5, 9, 10, 11
Request)
Delay from DMA HACK deassertion to HOREQ assertion
342
For "Last Data Register" read 5
For "Last Data Register" write 5
For other cases
Delay from DMA HACK assertion to HOREQ deassertion
343
HROD = 0 5
Delay from DMA HACK assertion to HOREQ deassertion for
344
"Last Data Register" read or write
HROD = 1, open drain Host Request 5, 11
3-48
3
Characteristics
9
9
9
4, 5, 10
5, 8, 10
5, 9, 10
DSP56367
120 MHz
Expression
Min
Max
0.0
4.7
3.3
0
4.7
3.3
T
C
8.3
2 × T
C
16.7
19.1
300.0
2 × T
+ 19.1
35.8
C
1.5 × T
+ 19.1
31.6
C
0.0
20.2
300.0
MOTOROLA
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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