Measurement Capture (Mode 6) - Motorola DSP56367 User Manual

Timer/ Event Counter
Timer Modes of Operation
13.4.2.4

Measurement Capture (Mode 6)

Bit Settings Mode Characteristics
TC3 TC2 TC1 TC0 Mode Name Kind TIO0 Clock
0 1 1 0 6 Capture Measurement Input Internal
In this mode, the timer counts the number of clocks that elapse between starting the timer and
receiving an external signal.
Set the TE bit to clear the counter and enable the timer. The value the timer is to count is
loaded into the TLR. When the first timer clock signal is received, the counter is loaded with
the TLR value. The timer clock signal can be taken from either the DSP56367 clock divided
by two (CLK/2) or from the prescaler clock output. Each subsequent clock signal increments
the counter.
At the first appropriate transition of the external clock detected on the TIO0 signal, the TCF
bit in the TCSR is set and, if the TCIE bit is set, a compare interrupt is generated. The counter
halts. The contents of the counter are loaded into the TCR. The value of the TCR represents
the delay between the setting of the TE bit and the detection of the first clock edge signal on
the TIO0 signal.
If the INV bit is set, a high-to-low transition signals the end of the timing period. If INV is
cleared, a low-to-high transition signals the end of the timing period.
If the counter overflows, the TOF bit is set, and if TOIE is set, an overflow interrupt is
generated.
The counter contents can be read at any time by reading the TCR.
13-20 DSP56367 MOTOROLA