Motorola DSP56367 User Manual page 315

24-bit digital signal processor
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RDC0 - RDC4
RX WORD
CLOCK
RECEIVER
FRAME RATE
DIVIDER
RECEIVE
CONTROL
LOGIC
TDC0 - TDC4
TX WORD
CLOCK
TRANSMITTER
FRAME RATE
DIVIDER
TRANSMIT
CONTROL
LOGIC
Figure 11-5 ESAI_1 Frame Sync Generator Functional Block Diagram
MOTOROLA
RFSL
INTERNAL RX FRAME CLOCK
SYNC
TYPE
SYN=0
RECEIVE
FRAME SYNC
SYN=1
TFSL
INTERNAL TX FRAME CLOCK
SYNC
TYPE
TRANSMIT
FRAME SYNC
DSP56367
Enhanced Serial Audio Interface 1 (ESAI_1)
ESAI_1 Programming Model
SYN=0
RFSD=1
RFSD=0
SYN=1
FLAG1 IN
FLAG1OUT
(SYNC MODE)
(SYNC MODE)
RFSD
FSR_1
TFSD
FST_1
11-9

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