Off-Chip Memory Expansion; Peripheral Overview - Motorola DSP56367 User Manual

24-bit digital signal processor
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1.4.9

OFF-CHIP MEMORY EXPANSION

Memory can be expanded off-chip as follows:
Data memory can be expanded to two 16 M × 24-bit word memory spaces in 24-bit
address mode (64K in 16-bit address mode).
Program memory can be expanded to one 16 M × 24-bit word memory space in 24-bit
address mode (64K in 16-bit address mode).
Other features of external memory expansion include the following:
External memory expansion port
Chip-select logic glueless interface to static random access memory (SRAM)
On-chip dynamic RAM (DRAM) controller for glueless interface to DRAM
Eighteen external address lines
1.5

PERIPHERAL OVERVIEW

The DSP56367 is designed to perform a wide variety of fixed-point digital signal processing
functions. In addition to the core features previously discussed, the DSP56367 provides the
following peripherals:
8-bit parallel host interface (HDI08, with DMA support) to external hosts
As many as 37 user-configurable general purpose input/output (GPIO) signals
Timer/event counter (TEC) module, containing three independent timers
Memory switch mode in on-chip memory
Four external interrupt/mode control lines and one external non-maskable interrupt
line
Enhanced serial audio interface (ESAI) with up to four receivers and up to six
transmitters, master or slave, using the I
programmable protocols
A second enhanced serial audio interface (ESAI_1) with 6 dedicated pins.
Serial host interface (SHI) using SPI and I
10-word receive FIFO, and support for 8-, 16-, and 24-bit words
Digital audio transmitter (DAX): a serial transmitter capable of supporting the SPDIF,
IEC958, CP-340, and AES/EBU digital audio formats
MOTOROLA
2
S, Sony, AC97, network, and other
2
C protocols, with multi-master capability,
DSP56367
DSP56367 Overview
Peripheral Overview
1-11

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