Motorola DSP56367 User Manual page 404

24-bit digital signal processor
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Equates
M_BDFW
EQU
$1F0000
M_BDFW0
EQU
16
M_BDFW1
EQU
17
M_BDFW2
EQU
18
M_BDFW3
EQU
19
M_BDFW4
EQU
20
M_BBS
EQU
21
M_BLH
EQU
22
M_BRH
EQU
23
;
DRAM Control Register
M_BCW
EQU
$3
M_BCW0
EQU
0
M_BCW1
EQU
1
M_BRW
EQU
$C
M_BRW0
EQU
2
M_BRW1
EQU
3
M_BPS
EQU
$300
M_BPS0
EQU
4
M_BPS1
EQU
5
M_BPLE
EQU
11
M_BME
EQU
12
M_BRE
EQU
13
M_BSTR
EQU
14
M_BRF
EQU
$7F8000
M_BRF0
EQU
15
M_BRF1
EQU
16
M_BRF2
EQU
17
B-14
; Default Area Wait Control Mask (BDFW0-BDFW4)
;Default Area Wait Control bit 0
;Default Area Wait Control bit 1
;Default Area Wait Control bit 2
;Default Area Wait Control bit 3
;Default Area Wait Control bit 4
; Bus State
; Bus Lock Hold
; Bus Request Hold
; In Page Wait States Bits Mask (BCW0-BCW1)
; In Page Wait States Bit 0
; In Page Wait States Bit 1
; Out Of Page Wait States Bits Mask (BRW0-BRW1)
;Out of Page Wait States bit 0
; Out of Page Wait States bit 1
; DRAM Page Size Bits Mask (BPS0-BPS1)
; DRAM Page Size Bits 0
; DRAM Page Size Bits 1
; Page Logic Enable
; Mastership Enable
; Refresh Enable
; Software Triggered Refresh
; Refresh Rate Bits Mask (BRF0-BRF7)
; Refresh Rate Bit 0
; Refresh Rate Bit 1
; Refresh Rate Bit 2
DSP56367
MOTOROLA

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