Specifications
Serial Host Interface (SHI) I
3.13
SERIAL HOST INTERFACE (SHI) I
No.
Characteristics
Tolerable spike width on SCL or SDA
Filters bypassed
Narrow filters enabled
Wide filters enabled
171
SCL clock frequency
171
SCL clock cycle
172
Bus free time
173
Start condition set-up time
174
Start condition hold time
175
SCL low period
176
SCL high period
177
SCL and SDA rise time
178
SCL and SDA fall time
179
Data set-up time
180
Data hold time
181
DSP clock frequency
Filters bypassed
Narrow filters enabled
Wide filters enabled
182
SCL low to data out valid
183
Stop condition set-up time
184
HREQ in deassertion to last SCL edge
(HREQ in set-up time)
186
First SCL sampling edge to HREQ output
deassertion
Filters bypassed
Narrow filters enabled
Wide filters enabled
3-62
2
C Protocol Timing
2
Table 3-20 SHI I
C Protocol Timing
Symbol/
1,2,3
Expression
—
F
SCL
T
SCL
T
BUF
T
SU;STA
T
HD;STA
T
LOW
T
HIGH
T
R
T
F
T
SU;DAT
T
HD;DAT
F
DSP
T
VD;DAT
T
SU;STO
t
SU;RQI
T
NG;RQO
×
2
T
+ 30
C
×
2
T
+ 120
C
×
2
T
+ 208
C
DSP56367
2
C PROTOCOL TIMING
4
Standard Mode
Fast Mode
Min
Max
Min
—
0
—
—
50
—
—
100
—
—
100
—
10
—
2.5
4.7
—
1.3
4.7
—
0.6
4.0
—
0.6
4.7
—
1.3
4.0
—
1.3
—
1000
20 + 0.1
—
300
20 + 0.1
250
—
100
0.0
—
0.0
10.6
—
28.5
11.8
—
39.7
13.1
—
61.0
—
3.4
—
4.0
—
0.6
0.0
—
0.0
—
46.7
—
—
136.7
—
—
224.7
—
5
Unit
Max
0
ns
50
ns
100
ns
400
kHz
µs
—
µs
—
µs
—
µs
—
µs
—
µs
—
×
300
ns
C
b
×
300
ns
C
b
—
ns
µs
0.9
—
MHz
—
MHz
—
MHz
µs
0.9
µs
—
—
ns
ns
46.7
136.7
224.7
MOTOROLA