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5
5.3.3 SBI (System Break Interrupt) Control Register
SBI (System Break Interrupt) Control Register
D0
D
Bit Name
0 – 6
No functions assigned
7
SBI REQ (SBI request)
W =
: Writable for only clearing operation (see the description below)
The SBI (System Break Interrupt) is an interrupt generated by a falling edge on SBI signal input pin.
When an SBI occurs, the SBI Control Register's SBIREQ (SBI request) bit is set to 1. The SBIREQ
bit cannot be set in software. To clear the SBIREQ bit after being set, perform the operation
described below. (Be careful not to clear this bit when no SBI request has been generated.)
• Write a 1 and then a 0 to SBIREQ.
1
2
3
Function
0 : SBI is not requested
1 : SBI is requested
5-9
INTERRUPT CONTROLLER (ICU)
5.3 ICU-Related Registers
<Address:H'0080 0006>
4
5
6
D7
SBIREQ
<When reset: H''00>
R
W
0
–
_______
Ver.0.10
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