Block Diagram - Mitsubishi Electric M32R Series User Manual

1

1.2 Block Diagram

Figure 1.2.1 shows a block diagram of the 32170. Features of each block are shown in Tables 1.2.1
through 1.2.3.
M32R CPU core
accumulator
(32 X 16 + 56)
Internal flash memory
(M32170F6:768KB)
(M32170F4:512KB)
(M32170F3:384KB)
Internal RAM
(M32170F6:40KB)
(M32170F4:32KB)
(M32170F3:32KB)
Real-time debugger (RTD)
PLL clock generator circuit
Figure 1.2.1 Block Diagram of the 32170
32170
(max 40MHz)
Multiplier-
Internal bus interface
(10-bit resolution, 16 channels) x 2
External bus
interface
Data Address
Input/output port (JTAG), 157 lines
1-7
OVERVIEW
1.2 Block Diagram
DMAC
(10 channels)
Multijunction timer
(MJT: 64 channels)
A-D converter
Serial I/O
(6 channels)
Interrupt controller
(31 sources, 8 levels)
Wait controller
Full CAN
(1 channel)
Ver.0.10