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10
The valid count values are the (counter set value + 1) and (reload register set value + 1). The
diagram below shows timer operation as an example when the initial counter value = 4 and the
initial reload register value = 5.
Count clock
Prescaler delay
Enable
Counter
F/F output
Interrupt
Note 1: What you actually see in the cycle immediately after enable is the previous counter value, and not 4.
Note 2: What you actually see in the cycle immediately after reload is H'FFFF (underflow value), and not 5.
Note 3: This diagram does not show detail timing information.
Figure 10.3.20 Example of Counting in TOP Continuous Output Mode
Count value =5
1
2
3
4
5
1
(Note 2)
(Note 1)
(5)
(4)
3
2
1
0
Reload
5
register
Underflow
10-97
MULTIJUNCTION TIMERS
10.3 TOP (Output-related 16-bit Timer)
Count value =6
2
3
4
5
6
1
(Note 2)
(5)
4
3
2
1
0
H'FFFF
Underflow
Count value =6
2
3
4
5
6
(Note 2)
(5)
4
3
2
1
0
Underflow
Ver.0.10
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