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10
(2) Reload register updates in TOD PWM output mode
In PWM output mode, when the timer remains idle, reload 0 and reload 1 registers are updated at
the same time data are written to the registers. But when the timer is active, reload 1 register is
updated by updating reload 0 register. However, when you read reload 0 and reload 1 registers,
the values you get are always the data written to the registers.
Internal bus
Reload 1
Prescaler output
Figure 10.8.8 PWM Circuit Diagram
If you want to rewrite reload 0 and reload 1 registers while the timer is operating, rewrite reload 1
register first and then reload 0 register. In this way, reload 0 and reload 1 registers both are updated
synchronously with PWM periods, from which the timer starts operating again. This operation can
normally be performed collectively by accessing register addresses wordwise (in 32 bits) beginning
with that of reload 1 register. (Data are automatically written to reload 1 and then reload 0 registers
in succession.)
If you update the reload registers in reverse by updating reload 0 register first and then reload 1
register, only reload 0 register is updated. In this case ?? when you read reload 0 and reload 1
registers, the values you get are always the data written to the registers, and not the reload values
being actually used.
Note that when updating the PWM period, if the PWM period is terminated before you finished
writing to reload 0, the PWM period is not updated in the current period and what you've set is
reflected in the next period.
Reload1WR
TODnRL1
Buffer
16-bit counter
10-195
MULTIJUNCTION TIMERS
10.8 TOD (Output-related 16-bit Timer)
Reload 0
TODnRL0
PWM mode control
F/F
Reload0WR
TO
Ver.0.10
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