Outline Of Tml Operation - Mitsubishi Electric M32R Series User Manual

10
1/2 internal
peripheral
clock
TIN20
TIN20S
TIN21
TIN21S
TIN22 TIN22S
TIN23S
TIN23
TIN30
TIN30S
TIN31 TIN31S
TIN32S
TIN32
TIN33 TIN33S
Figure 10.6.1 Block Diagram of TML (Input-related 32-bit Timer)

10.6.2 Outline of TML Operation

In TML, the counter starts counting upon deassertion of reset. The counter is a 32-bit up-counter,
where when a measure event signal is entered from an external device, the counter value at that
point in time is stored in each 32-bit measure register.
When reset input is deasserted, the counter starts operating with a divided-by-2 frequency of the
internal peripheral clock, and cannot be stopped once it has started. The counter is idle only when
the device remains reset.
A TIN interrupt can be generated by entering an external measure signal. However, no TML
counter overflow interrupts are available.
Clock bus Input event bus
3 2 1 0 3 2 1 0
S
IRQ11
S
IRQ11
IRQ11
IRQ11
S
IRQ18
S
IRQ18
IRQ18
IRQ18
3 2 1 0 3 2 1 0
S
: Selector
10-150
MULTIJUNCTION TIMERS
10.6 TML (Input-related 32-bit Timer)
TML0
clk
Counter
Measure register 3
(32 bits)
Measure register 2
Measure register 1
Measure register 0
cap3 cap2 cap1
S
S
S
TML1
clk
Counter
Measure register 3
(32 bits)
Measure register 2
Measure register 1
Measure register 0
cap3 cap2 cap1
S
S
S
Output event bus
0 1 2 3
cap0
cap0
0 1 2 3
Ver.0.10