Mitsubishi Electric M32R Series User Manual page 260

Mitsubishi 32-bit risc single-chip microcomputers
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9
Table 9.3.9 Causes of DMA Requests in DMA8 and Generation Timings
REQSL8
Cause of DMA Request
0
0
Software start
0
1
MJT (input event bus 0)
1
0
Serial I/O3 (reception completed)
1
1
MJT (TIN7 input signal)
Table 9.3.10 Causes of DMA Requests in DMA9 and Generation Timings
REQSL9
Cause of DMA Request
0
0
Software start
0
1
Serial I/O3 (transmit buffer empty)
1
0
MJT (TIN8 input signal)
1
1
One DMA8 transfer completed
9.3 Functional Description of the DMAC
DMA Request Generation Timing
When any data is written to DMA8 Software Request
Generation Register
When MJT's input event bus 0 signal is generated
When serial I/O3 reception is completed
When MJT's TIN7 input signal is generated
DMA Request Generation Timing
When any data is written to DMA9 Software Request
Generation Register
When serial I/O3 transmit buffer is emptied
When MJT's TIN8 input signal is generated
When one DMA8 transfer is completed (cascade mode)
9-30
DMAC
Ver.0.10

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