10
TIN13
(Note 2)
TIN18
(Note 2)
TIN0
(Note 2)
TIN19
(Note 2)
TIN20
(Note 2)
TIN1
(Note 2)
TIN2
(Note 2)
TIN7
(Note 2)
TIN8
(Note 2)
Figure 10.1.4 Block Diagram of MJT (4/4)
Clock bus
Input event bus
3 21 0
3 2 1 0
(Note 3)
AD0
completed
TIO8-udf
(Note 3)
(Note 3)
SIO0-TXD
SIO1-RXD
(Note 3)
(Note 3)
SIO0-RXD
(Note 3)
SIO2-RXD
(Note 3)
SIO1-TXD
(Note 3)
SIO2-TXD
(Note 3)
SIO3-RXD
(Note 3)
SIO3-TXD
3 21 0 3 21 0
10-8
MULTIJUNCTION TIMERS
10.1 Outline of Multijunction Timers
udf
S
DMA0
end
udf
DMA1
S
end
udf
S
DMA2
end
udf
DMA3
S
end
udf
DMA4
S
udf
DMA5
S
end
udf
S
DMA6
end
udf
S
DMA7
end
udf
S
DMA8
end
udf
S
DMA9
Output event bus
0 1 2 3
DMAIRQ0
DMAIRQ0
DMAIRQ0
DMAIRQ0
DMAIRQ0
DMAIRQ1
DMAIRQ1
DMAIRQ1
DMAIRQ1
DMAIRQ1
0 12 3
Ver.0.10