Table of Contents
Advertisement
MULTIJUNCTION TIMERS
10
10.3 TOP (Output-related 16-bit Timer)
Enabled (by writing to enable bit
or by external input)
Disabled (by underflow)
Count clock
Enable bit
Write to
correction register
Overflow occurs
H'(FFF0+0014)
H'FFFF
H'FFFF
H'FFF8
Indeterminate
H'FFF0
Counter
Actual count
H'0004
after overflow
H'0000
Reload register
H'FFF8
Correction register
H'0014
Indeterminate
F/F output
Data inverted
Data inverted
by enable
by underflow
TOP interrupt
due to underflow
Note: This diagram does not show detail timing information.
Figure 10.3.14 Example of Operation in TOP Single-shot Output Mode Where Count
Overflows due to Correction
10-90
Ver.0.10
Advertisement
Table of Contents
