Operation In Top Delayed Single-Shot Output Mode (With Correction Function) - Mitsubishi Electric M32R Series User Manual

Mitsubishi 32-bit risc single-chip microcomputers
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10.3.10 Operation in TOP Delayed Single-shot Output Mode (With Correction Function)

(1) Outline of TOP delayed single-shot output mode
In delayed single-shot output mode, the timer generates a pulse in width of (reload register set
value + 1) only once, with the output delayed by an amount of time equal to (counter set value +
1) and then stops without performing any operation.
When after setting the counter and reload register, the timer is enabled (by writing to the enable
bit in software or by external input), it starts counting down from the counter's set value
synchronously with the count clock. The first time the counter underflows, the reload register
value is loaded into the counter causing it to continue counting down, and the counter stops when
it underflows next time.
The F/F output waveform in delayed single-shot output mode is inverted (F/F output levels
change from low to high, or vice versa) when the counter underflows first time and next,
generating a single-shot pulse waveform in width of (reload register set value + 1) only once, with
the output delayed by an amount of time equal to (first set value of counter + 1). Also, an interrupt
can be generated when the counter underflows first time and next.
The valid count values are the (counter set value + 1) and (reload register set value + 1). The
diagram below shows timer operation as an example when the initial counter value = 4 and the
initial reload register value = 5.
Count clock
Prescaler delay
F/F output
Interrupt
Note 1: What you actually see in the cycle immediately after enable is the previous counter value, and not 4.
Note 2: What you actually see in the cycle immediately after reload is H'FFFF (underflow value), and not 5.
Note 3: This diagram does not show detail timing information.
Figure 10.3.15 Example of Counting in TOP Delayed Single-shot Output Mode
Count value =(4+1)+(5+1)=11
1
2
3
Enable
(Note 1)
(4)
3
Counter
2
Reload
register
10.3 TOP (Output-related 16-bit Timer)
4
5
6
7
8
9
(Note 2)
(5)
4
3
2
1
0
H'FFFF
5
Underflow
10-91
MULTIJUNCTION TIMERS
1
1
0
1
1
0
H'FFFF
Underflow
Ver.0.10

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