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10
(3) Delayed single-shot output mode (without correction function)
In delayed single-shot output mode, the timer generates a pulse in width of (reload 0 register set
value + 1) only once, with the output delayed by an amount of time equal to (counter set value +
1) and then stops without performing any operation.
When after setting the counter and reload 0 register, the timer is enabled (by writing to the enable
bit in software or by TID1 underflow/overflow signal), it starts counting down from the counter's
set value synchronously with the count clock. The first time the counter underflows, the reload 0
register value is loaded into the counter causing it to continue counting down, and the counter
stops when it underflows next time.
The F/F output waveform in delayed single-shot output mode is inverted when the counter
underflows first time and next, generating a single-shot pulse waveform in width of (reload 0
register set value + 1) only once, with the output delayed by an amount of time equal to (first set
value + 1) only once, with the output delayed by an amount of time equal to (first set value of
counter + 1).
Also, an interrupt can be generated when the counter underflows first time and next.
(4) Continuous output mode (without correction function)
In continuous output mode, the timer counts down clock pulses starting from the set value of the
counter and when the counter underflows, reloads it with the reload 0 register value. Thereafter,
this operation is repeated each time the counter underflows, thus generating consecutive pulses
in width of (reload 0 register set value + 1).
When after setting the counter and reload 0 register, the timer is enabled (by writing to the enable
bit in software or by TID1 underflow/overflow signal), it starts counting down from the counter's
set value synchronously with the count clock and when the minimum count is reached, generates
an underflow. This underflow causes the counter to be reloaded with the content of reload 0
register and start counting again. Thereafter, this operation is repeated each time an underflow
occurs. To stop the counter, disable count by writing to the enable bit in software.
The F/F output waveform in continuous output mode is inverted at startup and upon underflow,
generating consecutive pulses until the timer stops counting. Also, an interrupt can be generated
each time the counter underflows.
10.8 TOD (Output-related 16-bit Timer)
10-176
MULTIJUNCTION TIMERS
Ver.0.10
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