Mitsubishi Electric MELSEC iQ-R Series Programming Manual page 194

• If "501: Master CPU synchronous encoder axis" in "[Pr.320] Synchronous encoder axis type" is selected.
The change amount of the input pulse to the synchronous encoder on the master CPU is transmitted to the slave CPU.
Also, control by a current value change by "[Rq.320] Synchronous encoder axis control request (R: M42241+8n/Q:
D14823+20n)", counter enable, and counter disable, are not reflected in the change amount that is transmitted.
[Pr.320] Synchronous encoder axis type
1: Synchronous encoder Pn
101: Synchronous encoder via servo amplifier
201: Via device
Synchronous encoder input
Unit conversion
Input smoothing
processing
Phase
compensation
on processing
Rotation direction
restriction
Current value
change
Current value of
synchronous
encoder axis
Setting method
Set the input axis of the master CPU in "[Pr.320] Synchronous encoder axis type".
Connection is invalid just after the system's power supply is ON. If "[Rq.324] Connection command of synchronous encoder
via device/master CPU (R: M42242+8n/Q: M11602+4n)" is turned ON, connection becomes valid, "0" is stored in "[Md.320]
Synchronous encoder axis current value (R: D38560+32n, D38561+32n/Q: D13240+20n, D13241+20n)", "[Md.321]
Synchronous encoder axis current value per cycle (R: D38562+32n, D38563+32n/Q: D13242+20n, D13243+20n)", and will
be on the counter enabling status.
At this time, if setting the input axis of the master CPU to current value, execute a current value change.
When the input axis set in "[Pr. 320] Synchronous encoder axis type" is invalid on the master CPU side, or not connected, a
minor error (error code: 1BDEH) occurs, and connection becomes invalid.
Match the control unit of "[Pr.321] Synchronous encoder axis unit setting" with the unit settings of the input
axis of the master CPU.
8 AUXILIARY AND APPLIED FUNCTIONS
192
8.4 Multiple CPU Advanced Synchronous Control
Master CPU side
Counter disable/
Counter enable
[Md.323] Synchronous encoder axis
phase compensation amount
(R: D38566+32n, D38567+32n/
Q: D13246+20n, D13247+20n)
[Md.324] Synchronous encoder axis
rotation direction restriction amount
(R: D38568+32n, D38569+32n/
Q: D13248+20n, D13249+20n)
[Md.320] Synchronous encoder axis
current value
(R: D38560+32n, D38561+32n/
Q: D13240+20n, D13241+20n)
[Md.321] Synchronous encoder axis
current value per cycle
(R: D38562+32n, D38563+32n/
Q: D13242+20n, D13243+20n)
[Md.322] Synchronous encoder axis
speed
(R: D38564+32n, D38565+32n/
Q: D13244+20n, D13245+20n)
Slave CPU side
[Pr.320] Synchronous encoder axis type
501: Master CPU synchronous encoder axis
Synchronous encoder input
Counter disable/
Counter enable
Unit conversion
Input smoothing
processing
Phase
compensation
on processing
Rotation direction
restriction
Current value
change
Current value of
synchronous
encoder axis
[Md.323] Synchronous encoder axis
phase compensation amount
(R: D38566+32n, D38567+32n/
Q: D13246+20n, D13247+20n)
[Md.324] Synchronous encoder axis
rotation direction restriction amount
(R: D38568+32n, D38569+32n/
Q: D13248+20n, D13249+20n)
[Md.320] Synchronous encoder axis
current value
(R: D38560+32n, D38561+32n/
Q: D13240+20n, D13241+20n)
[Md.321] Synchronous encoder axis
current value per cycle
(R: D38562+32n, D38563+32n/
Q: D13242+20n, D13243+20n)
[Md.322] Synchronous encoder axis
speed
(R: D38564+32n, D38565+32n/
Q: D13244+20n, D13245+20n)