Toshiba DP120F Service Manual page 368

• DMAC GA Signal Table (6/7)
No. Signal Name
142 SPK
143-146 DM0-3
147 ROUTX
149 BUENA
150 BUCHG
151 CHRON
152-156 DOP2-7
158 X32M
160 PIXRDY
161 IPRTA1
162-167 IPRTA2-7
169 RESETX
170-172 TST0-2
173 ANSDET2
174 ANSDET1
175 INTMD1
176 MDRRQ1
I: Input O: Output
March 2000 © TOSHIBA TEC
Type
O Speaker clock
Outputs a clock for the artificial ring and tone sig-
nals.
- Monitor signal
O Watchdog reset signal (active-low)
Detects crashing of the CPU (IC66).
O Backup data presence signal (H: Present, L: Absent)
Indicates the presence or absence of backup data.
O Backup latch signal (up edge trigger)
Holds the presence or absence status of backup data.
- Monitor signal
- Monitor signal
I System clock input (32.0000MHz)
I PIX-DRAM ready signal
Indicates that the data to be transferred to the PIX-
DRAM (IC25) is ready for transfer.
I +5V power supply supervisory signal
Inputs a power supply voltage of +5V through a re-
sistor and supervises the voltage.
- Signal ground (Pull down)
I Reset signal (active-low)
Resets the system.
I Signal ground
I Line 2 frequency detect signal
Detects the frequency which flows through the con-
nection line of the line 2 NCU PBA.
I Line 1 frequency detect signal
Detects the frequency which flows through the con-
nection line of the line 1 NCU PBA.
I Line 1 MODEM interrupt signal (active-low)
The interrupt signal of the MODEM (IC5) is input.
(Interrupt level 6)
I Line 1 MODEM receive data transfer request signal
The MODEM makes a request to transfer receive
data.
I/O: Bidirectional
Functions
7-59 DP120F/DP125F Circuit Description