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Chapter 16
DMA Controller Module
This chapter describes the MCF5282 Direct Memory Access (DMA) controller module. It
provides an overview of the module and describes in detail its signals and registers. The
latter sections of this chapter describe operations, features, and supported data transfer
modes in detail.
The designation "n" is used throughout this section to refer to
registers or signals associated with one of the four identical
DMA channels: DMA0, DMA1, DMA2 or DMA3.
16.1 Overview
The DMA controller module provides an efficient way to move blocks of data with minimal
processor interaction. The DMA module, shown in Figure 16-1, provides four channels that
allow byte, word, longword, or 16-byte burst data transfers. Each channel has a dedicated
source address register (SARn), destination address register (DARn), byte count register
(BCRn), control register (DCRn), and status register (DSRn). Transfers are dual address to
on-chip devices, such as UART, SDRAM controller, and GPIOs.
MOTOROLA
NOTE
Chapter 16. DMA Controller Module
16-1
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