Motorola ColdFire MCF5281 User Manual page 28

Figure
Number
23-9 UART Input Port Change Register (UIPCRn) ......................................................... 23-12
23-10 UART Auxiliary Control Register (UACRn) ........................................................... 23-13
23-11 UART Interrupt Status/Mask Registers (UISRn/UIMRn)........................................ 23-13
23-12 UART Baud Rate Generator Register (UBG1n) ...................................................... 23-14
23-13 UART Baud Rate Generator Register (UBG2n) ...................................................... 23-14
23-14 UART Input Port Register (UIPn) ............................................................................ 23-15
23-15 UART Output Port Command Registers (UOP1n/UOP0n) ..................................... 23-15
23-16 UART Block Diagram Showing External and Internal Interface Signals ................ 23-17
23-17 UART/RS-232 Interface ........................................................................................... 23-18
23-18 Clocking Source Diagram......................................................................................... 23-19
23-19 Transmitter and Receiver Functional Diagram......................................................... 23-20
23-20 Transmitter Timing Diagram ................................................................................... 23-22
23-21 Receiver Timing ....................................................................................................... 23-23
23-22 Automatic Echo ........................................................................................................ 23-25
23-23 Local Loop-Back ...................................................................................................... 23-25
23-24 Remote Loop-Back ................................................................................................... 23-26
23-25 Multidrop Mode Timing Diagram ............................................................................ 23-27
23-26 UART Mode Programming Flowchart ..................................................................... 23-31
2
24-1 I C Module Block Diagram ....................................................................................... 24-2
24-2 I2C Standard Communication Protocol ...................................................................... 24-3
24-3 Repeated START ........................................................................................................ 24-4
24-4 Synchronized Clock SCL............................................................................................ 24-5
24-5 I2C Address Register (I2ADR)................................................................................... 24-6
24-6 I2C Frequency Divider Register (I2FDR) ................................................................. 24-7
2
24-7 I C Control Register (I2CR) ....................................................................................... 24-8
2
24-8 I CR Status Register (I2SR) ...................................................................................... 24-9
2
24-9 I C Data I/O Register (I2DR) .................................................................................. 24-10
24-10 Flow-Chart of Typical I2C Interrupt Routine........................................................... 24-15
25-1 FlexCAN Block Diagram and Pinout ........................................................................ 25-2
25-2 Typical CAN system................................................................................................... 25-4
25-3 Extended ID Message Buffer Structure ...................................................................... 25-5
25-4 Standard ID Message Buffer Structure ....................................................................... 25-5
25-5 FlexCAN Memory Map.............................................................................................. 25-8
25-6 CAN Module Configuration Register (CANMCR).................................................. 25-20
25-7 FlexCAN Control Register 0 (CANCTRL0) ............................................................ 25-22
25-8 FlexCAN Control Register 1 (CANCTRL1) ............................................................ 25-23
25-9 Prescaler Divide Register (PRESDIV) ..................................................................... 25-24
25-10 FlexCAN Control Register 2 (CANCTRL2) ............................................................ 25-25
25-11 Free Running Timer (TIMER).................................................................................. 25-26
25-12 Rx Mask Registers (RXGMASK, RX14MASK, and RX15MASK) ....................... 25-27
25-13 FlexCAN Error and Status Register (ESTAT) ......................................................... 25-28
25-14 Interrupt Mask Register (IMASK)............................................................................ 25-30
xxviii
ILLUSTRATIONS
Title
MCF5282 User's Manual
Page
Number
MOTOROLA