Table of Contents
Advertisement
Buffer Descriptors
Table 17-36. Receive Buffer Descriptor Field Definitions
Word
Location
Offset + 0
Bit 15
Offset + 0
Bit 14
Offset + 0
Bit 13
Offset + 0
Bit 12
Offset + 0
Bit 11
Offset + 0
Bits 10–9
Offset + 0
Bit 8
Offset + 0
Bit 7
Offset + 0
Bit 6
Offset + 0
Bit 5
Offset + 0
Bit 4
Offset + 0
Bit 3
Offset + 0
Bit 2
17-48
Field Name
E
Empty. Written by the FEC (=0) and user (=1).
0 The data buffer associated with this BD has been filled with
received data, or data reception has been aborted due to an
error condition. The status and length fields have been
updated as required.
1 The data buffer associated with this BD is empty, or
reception is currently in progress.
RO1
Receive software ownership.
This field is reserved for use by software. This read/write bit will
not be modified by hardware, nor will its value affect hardware.
W
Wrap. Written by user.
0 The next buffer descriptor is found in the consecutive
location
1 The next buffer descriptor is found at the location defined in
ERDSR.
RO2
Receive software ownership.
This field is reserved for use by software. This read/write bit will
not be modified by hardware, nor will its value affect hardware.
L
Last in frame. Written by the FEC.
0 The buffer is not the last in a frame.
1 The buffer is the last in a frame.
—
Reserved.
M
Miss. Written by the FEC. This bit is set by the FEC for frames
that were accepted in promiscuous mode, but were flagged as
a "miss" by the internal address recognition. Thus, while in
promiscuous mode, the user can use the M-bit to quickly
determine whether the frame was destined to this station. This
bit is valid only if the L-bit is set and the PROM bit is set.
0 The frame was received because of an address recognition
hit.
1 The frame was received because of promiscuous mode.
BC
Will be set if the DA is broadcast (FF-FF-FF-FF-FF-FF).
MC
Will be set if the DA is multicast and not BC.
LG
Rx frame length violation. Written by the FEC. A frame length
greater than RCR[MAX_FL] was recognized. This bit is valid
only if the L-bit is set. The receive data is not altered in any way
unless the length exceeds 2047 bytes.
NO
Receive non-octet aligned frame. Written by the FEC. A frame
that contained a number of bits not divisible by 8 was received,
and the CRC check that occurred at the preceding byte
boundary generated an error. This bit is valid only if the L-bit is
set. If this bit is set the CR bit will not be set.
—
Reserved.
CR
Receive CRC error. Written by the FEC. This frame contains a
CRC error and is an integral number of octets in length. This bit
is valid only if the L-bit is set.
MCF5282 User's Manual
Description
MOTOROLA
Advertisement
Table of Contents
