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Below the queue execution flows are three sets of blocks that show the status information
that is made available to the user. The first two rows of status blocks show the condition of
each queue as:
• Idle
• Active
• Pause
• Suspended (queue 2 only)
• Trigger pending
The third row of status blocks shows the 4-bit QS status register field that encodes the
condition of the two queues. Two transition status cases, QS = 0011 and QS = 0111, are not
shown because they exist only very briefly between stable status conditions.
The first three examples in Figure 27-23 through Figure 27-25 (S1, S2, and S3) show what
happens when a new trigger event is recognized before the queue has completed servicing
the previous trigger event on the same queue.
In situation S1 (Figure 27-23), one trigger event is being recognized on each queue while
that queue is still working on the previously recognized trigger event. The trigger overrun
error status bit is set, and the premature trigger event is otherwise ignored. A trigger event
that occurs before the servicing of the previous trigger event is through does not disturb the
queue execution in progress.
IDLE
Q1:
Q2:
0000
QS:
In situation S2 (Figure 27-24), more than one trigger event is recognized before servicing
of a previous trigger event is complete. The trigger overrun bit is again set, but the
additional trigger events are otherwise ignored. After the queue is complete, the first newly
detected trigger event causes queue execution to begin again. When the trigger event rate
is high, a new trigger event can be seen very soon after completion of the previous queue,
MOTOROLA
T1
T1
Q1:
C1
C2
C3
TOR1
ACTIVE
IDLE
1000
Figure 27-23. CCW Priority Situation 1
Chapter 27. Queued Analog-to-Digital Converter (QADC)
C4
T2
CF1
Q2:
C1
C2
ACTIVE
0000
Digital Control Subsystem
T2
C3
C4
TOR2
CF2
IDLE
IDLE
0010
0000
27-41
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