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writes, 6-17
registers
clock divider (CFMCLKD), 6-10
setting, 6-18
command (CFMCMD), 6-16
configuration (CFMCR), 6-9
data access (CFMDACC), 6-14
FLASHBAR, 2-8, 6-5
protection (CFMPROT), 6-12
security (CFMSEC), 6-10
supervisor access (CFMSACC), 6-13
user status (CFMUSTAT), 6-15
reset, 6-24
security
back door access, 6-24
erase verify check, 6-24
Collision handling, 17-17
Core
hardware configuration, 2-17
low-power modes, 7-7
pipelines, 2-1
programming model, 2-8
supervisor, 2-5
user, 2-2
registers
address (An), 2-3
condition code (CCR), 2-4, 2-4
data (Dn), 2-3
stack pointer (A7), 2-3, 2-7
status register (SR), 2-6
vector base (VBR), 2-8
CRC error, 17-19
Cyclic redundancy check error (CRCERR) bit, 25-29
D
DC characteristics, 33-4
Debug
see BDM
breakpoint
functions, 29-7
operation, 29-37
data, 29-40
electrical characteristics
AC timing specifications, 33-27
emulator mode, 29-38
interrupt, 29-38
low-power modes, 7-16
operation, 29-37
overview, 29-1
processor status, 29-3, 29-40
programming model, 29-5
registers
address attribute trigger (AATR), 29-8
address breakpoint (ABLR, ABHR), 29-9
MOTOROLA
INDEX
configuration/status (CSR), 29-10
data breakpoint/mask (DBR, DBMR), 29-12
program
trigger definition (TDR), 29-14
support, real-time, 29-37
taken branch, 29-4
trace, real-time, 29-3
Debug interrupt, 2-15, 29-38
Divide-by-zero exception, 2-14
DMA controller
channel prioritization, 16-13
data transfer
auto alignment, 16-14
bandwidth control, 16-15
dual-address, 16-12
overview, 16-4
requests, 16-11
termination, 16-15
functional description, 16-11
low-power modes, 7-8
overview, 16-1
programming, 16-13
registers
byte count (BCRn), 16-7
control (DCRn), 16-8
destination address (DARn), 16-6
request control (DMAREQC), 16-3
source address (SARn), 16-6
status (DSRn), 16-10
signal diagram, 16-2
DMA timers
code example, 21-9
electrical characteristics
AC timing specifications, 33-24
memory map, 21-3
operation
capture mode, 21-3
general, 21-8
low-power modes, 7-9
output mode, 21-3
overview, 21-1
prescaler, 21-2
programming model, 21-2
reference compare, 21-3
registers
capture (DTCRn), 21-7
counters (DTCNn), 21-8
event (DTERn), 21-6
mode (DTMRn), 21-4
reference (DTRRn), 21-7
time-out values, 21-10
Doze mode, 7-6
MCF5282 User's Manual
counter
breakpoint/mask
PBMR), 29-13
(PBR,
Index-3
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