Definition Of Drc Encoding—Read - Motorola ColdFire MCF5281 User Manual

Background Debug Mode (BDM)
DRc[4:0]
0x00
0x01–0x1F
Command Sequence:
Operand Data:
Result Data:
29.5.3.3.12 Write Debug Module Register (
The operand (longword) data is written to the specified debug module register. All 32 bits
of the register are altered by the write. DSCLK must be inactive while the debug module
register writes from the CPU accesses are performed using the WDEBUG instruction.
Command Format:
15 12
0x2
Table 29-3 shows the definition of the DRc write encoding.
Command Sequence:
WDMREG
???
29-36
Table 29-20. Definition of DRc Encoding—Read
Debug Register Definition
Configuration/Status
Reserved
RDMREG
???
Figure 29-38.
RDMREG
None
The contents of the selected debug register are returned as a
longword value. The data is returned most-significant word first.
11
0xC
Figure 29-39.
WDMREG
MS DATA
'NOT READY'
XXX
'ILLEGAL'
Figure 29-40.
WDMREG
MCF5282 User's Manual
Mnemonic
CSR
—
XXX NEXT CMD
MS RESULT LS RESULT
XXX NEXT CMD
'ILLEGAL' 'NOT READY'
Command Sequence
)
WDMREG
8 7 5
100
D[31:16]
D[15:0]
BDM Command Format
LS DATA
'NOT READY'
NEXT CMD
'NOT READY'
Command Sequence
Initial State
0x0 p. 29-10
—
4
DRc
NEXT CMD
'CMD COMPLETE'
MOTOROLA
Page
—
0