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Philips Semiconductors
ARM-based Microcontroller
2
I
C Bus
SDA
LPC2119/2129/2194
LPC2292/2294
2
I
C Operating Modes
Master Transmitter Mode:
In this mode data is transmitted from master to slave. Before the master transmitter mode can be entered, I2CONSET must be
initialized as shown in Figure 25. I2EN must be set to 1 to enable the I
acknowledge any address when another device is master of the bus, so it can not enter slave mode. The STA, STO and SI bits
must be 0. The SI Bit is cleared by writing 1 to the SIC bit in the I2CONCLR register.
I2CONSET
The first byte transmitted contains the slave address of the receiving device (7 bits) and the data direction bit. In this mode the
data direction bit (R/W) should be 0 which means Write. The first byte transmitted contains the slave address and Write bit. Data
is transmitted 8 bits at a time. After each byte is transmitted, an acknowledge bit is received. START and STOP conditions are
output to indicate the beginning and the end of a serial transfer.
2
The I
C interface will enter master transmitter mode when software sets the STA bit. The I
as soon as the bus is free. After the START condition is transmitted, the SI bit is set, and the status code in I2STAT should be
08h. This status code must be used to vector to an interrupt service routine which should load the slave address and Write bit to
I2DAT (Data Register), and then clear the SI bit. SI is cleared by writing a 1 to the SIC bit in the I2CONCLR register.
I2C Interface
R
P
SCL
Other Device with I
2
Figure 24: I
C Bus Configuration
7
6
5
-
I2EN
STA
-
1
0
Figure 25: Slave Mode Configuration
LPC2119/2129/2194/2292/2294
R
P
2
C
Interface
2
C function. If the AA bit is 0, the I
4
3
2
STO
SI
AA
0
0
0
2
167
Preliminary User Manual
SDA
SCL
2
Other Device with I
C
Interface
2
C interface will not
1
0
-
-
-
-
C logic will send the START condition
May 03, 2004
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