Table 128: Can Interrupt Enable Register (Canier - 0Xe00X X010) - Philips LPC2194 User Manual

Philips Semiconductors
ARM-based Microcontroller
Table 128: CAN Interrupt and Capture Register (CANICR - 0xE00x x00C)
CANICR Name Function
Error Code Capture: when the CAN controller detects a bus error, the location of
the error within the frame is captured in this field. The value reflects an internal
state variable.
00010: ID28:21
00011: Start of Frame
00100: SRTR Bit
20:16 ERRBIT
00101: IDE Bit
00110: ID20:18
00111: ID17:13
01000: CRC
01001: Reserved Bit 0
Reading this byte enables another Bus Error Interrupt.
When the CAN controller detects a bus error, the direction of the current bit is
21 ERRDIR
captured in this bit. 1=receiving, 0=transmitting.
When the CAN controller detects a bus error, the type of error is captured in this
23:22 ERRC field:
00=bit error, 01=Form error, 10=Stuff error, 11=other error.
Each time arbitration is lost while trying to send on the CAN, the bit number within
the frame is captured into this field. 0 indicates arbitration loss in the first (MS) bit
28:24 ALCBIT
of the Identifier ... 31 indicates loss in the RTR bit of an extended frame. After this
byte is read, the ALI bit is cleared and a new Arbitration Lost interrupt can occur.
Interrupt Enable Register (CANIER - 0xE00x x010)
This read/write register controls whether various events on the CAN controller will result in an interrupt. Bits 7:0 in this register
correspond 1-to-1 with bits 7:0 in the CANICR register. See Table 124 for details on specific CAN channel register address.
Table 129: CAN Interrupt Enable Register (CANIER - 0xE00x x010)
CANIER Name Function
0 RIE Receiver Interrupt Enable.
1 TIE1 Transmit Interrupt Enable (1)
2 EIE Error Warning Interrupt Enable
3 DOIE Data Overrun Interrupt Enable
4 WUIE Wake-Up Interrupt Enable
5 EPIE Error Passive Interrupt Enable
6 ALIE Arbitration Lost Interrupt Enable
7 BEIE Bus Error Interrupt Enable
8 IDIE ID Ready Interrupt Enable
9 TIE2 Transmit Interrupt Enable (2)
10 TIE3 Transmit Interrupt Enable (3)
CAN Controllers and Acceptance Filter
01010: Data field
01011: DLC
01100: RTR bit
01101: Reserved Bit 1
01110: ID4:0
01111: ID12:5
10001: Active Error flag
10010: Intermission
196
LPC2119/2129/2292/2294
10011: dominant OK bits
10110: Passive error flag
10111: Error delimiter
11000: CRC delimiter
11001: Ack slot
11010: End of Frame
11011: Ack delimiter
11100: Overload flag
Preliminary User Manual
Reset Value RM Set
0 X
0 X
0 X
0 X
Reset Value RM Set
0 X
0 X
0 X
0 X
0 X
0 X
0 X
0 X
0 X
0 X
0 X
May 03, 2004