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Philips Semiconductors
ARM-based Microcontroller
REGISTER DESCRIPTION
The PWM function adds new registers and registers bits as shown in Table 166 below.
Table 166: Pulse Width Modulator Register Map
Name
PWM Interrupt Register. The IR can be written to clear interrupts. The IR can
PWMIR
be read to identify which of the possible interrupt sources are pending.
PWM Timer Control Register. The TCR is used to control the Timer Counter
PWMTCR
functions. The Timer Counter can be disabled or reset through the TCR.
PWM Timer Counter. The 32-bit TC is incremented every PR+1 cycles of pclk.
PWMTC
The TC is controlled through the TCR.
PWMPR
PWM Prescale Register. The TC is incremented every PR+1 cycles of pclk.
PWM Prescale Counter. The 32-bit PC is a counter which is incremented to the
PWMPC
value stored in PR. When the value in PR is reached, the TC is incremented.
PWM Match Control Register. The MCR is used to control if an interrupt is
PWMMCR
generated and if the TC is reset when a Match occurs.
PWM Match Register 0. MR0 can be enabled through MCR to reset the TC,
stop both the TC and PC, and/or generate an interrupt when it matches the TC.
PWMMR0
In addition, a match between MR0 and the TC sets all PWM outputs that are in
single-edge mode, and sets PWM1 if it is in double-edge mode.
PWM Match Register 1. MR1 can be enabled through MCR to reset the TC,
stop both the TC and PC, and/or generate an interrupt when it matches the TC.
PWMMR1
In addition, a match between MR1 and the TC clears PWM1 in either single-
edge mode or double-edge mode, and sets PWM2 if it is in double-edge mode.
PWM Match Register 2. MR2 can be enabled through MCR to reset the TC,
stop both the TC and PC, and/or generate an interrupt when it matches the TC.
PWMMR2
In addition, a match between MR2 and the TC clears PWM2 in either single-
edge mode or double-edge mode, and sets PWM3 if it is in double-edge mode.
PWM Match Register 3. MR3 can be enabled through MCR to reset the TC,
stop both the TC and PC, and/or generate an interrupt when it matches the TC.
PWMMR3
In addition, a match between MR3 and the TC clears PWM3 in either single-
edge mode or double-edge mode, and sets PWM4 if it is in double-edge mode.
PWM Match Register 4. MR4 can be enabled through MCR to reset the TC,
stop both the TC and PC, and/or generate an interrupt when it matches the TC.
PWMMR4
In addition, a match between MR4 and the TC clears PWM4 in either single-
edge mode or double-edge mode, and sets PWM5 if it is in double-edge mode.
Pulse Width Modulator (PWM)
Description
230
Preliminary User Manual
LPC2119/2129/2194/2292/2294
Reset
Access
Value*
R/W
0
R/W
0
RW
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
Address
0xE0014000
0xE0014004
0xE0014008
0xE001400C
0xE0014010
0xE0014014
0xE0014018
0xE001401C
0xE0014020
0xE0014024
0xE0014040
May 03, 2004
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