Table 2: Lpc2119/2129/2194/2292/2294 Registers - Philips LPC2194 User Manual

Philips Semiconductors
ARM-based Microcontroller
Unused (reserved) bits are marked with "-" and represented as gray fields. Access to them is restricted as already described.

Table 2: LPC2119/2129/2194/2292/2294 Registers

Address
Name
Offset
WD
WD
0xE0000000
MOD
0xE0000004 WDTC
WD
0xE0000008
FEED
0xE000000C WDTV
TIMER0
0xE0004000 T0IR
0xE0004004 T0TCR
0xE0004008 T0TC
0xE000400C T0PR
0xE0004010 T0PC
0xE0004014 T0MCR
0xE0004018 T0MR0
0xE000401C T0MR1
0xE0004020 T0MR2
0xE0004024 T0MR3
Introduction
Description MSB
Watchdog
-
mode register
Watchdog
timer
constant
register
Watchdog
feed
sequence
register
Watchdog
timer value
register
T0 Interrupt CR3 CR2
Register Int. Int.
T0 Control
-
Register
T0 Counter
T0 Prescale
Register
T0 Prescale
Counter
4 reserved (-) bits
T0 Match
Control
Reset
Register
Int. on
on
MR2
MR2
T0 Match
Register 0
T0 Match
Register 1
T0 Match
Register 2
T0 Match
Register 3
WD
- - -
INT
32 bit data
8 bit data (0xAA fallowed by 0x55)
32 bit data
CR1 CR0 MR3
Int. Int. Int.
- - - -
32 bit data
32 bit data
32 bit data
Stop
on
MR3
Stop Reset
Int. on
on on
MR1
MR1 MR1
32 bit data
32 bit data
32 bit data
32 bit data
22
Preliminary User Manual
LPC2119/2129/2194/2292/2294
LSB
WD WDRE
WDEN
TOF SET
MR2 MR1 MR0
Int. Int. Int.
CTR CTR
-
Reset Enable
Reset Stop
Int. on
on on
MR3
MR3 MR2
Stop Reset
Int. on
on on
MR0
MR0 MR0
Reset
Access
Value
R/W 0
R/W 0xFF
WO NA
RO 0xFF
R/W 0
R/W 0
RW 0
R/W 0
R/W 0
R/W 0
R/W 0
R/W 0
R/W 0
R/W 0
May 03, 2004