Ld %Rd, [%Rb] - Epson S1C17 Series Manual

Cmos 16-bit single chip microcontroller
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ld %rd, [%rb]

Function
16-bit data transfer
Standard)
Extension 1) rd(15:0) ← W[rb + imm13], rd(23:16) ← 0
Extension 2) rd(15:0) ← W[rb + imm24], rd(23:16) ← 0
15 14 13 12 11 10
Code
0
0
1
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IL
IE
C
Flag
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Mode
Src: Register indirect %rb = %r0 to %r7
Dst: Register direct %rd = %r0 to %r7
CLK
One cycle (two cycles when the ext instruction is used)
Description
(1) Standard
ld
%rd,[%rb]
The 16-bit data in the specified memory location is transferred to the rd register. The rb register
contains the memory address to be accessed. The eight high-order bits of the rd register are set
to 0.
(2) Extension 1
ext
ld
The e x t instruction changes the addressing mode to register indirect addressing with
displacement. As a result, the content of the rb register with the 13-bit immediate imm13 added
comprises the memory address, the 16-bit data in which is transferred to the rd register. The
content of the rb register is not altered. The eight high-order bits of the rd register are set to 0.
(3) Extension 2
ext
ext
ld
The addressing mode changes to register indirect addressing with displacement, so the content
of the rb register with the 24-bit immediate imm24 added comprises the memory address, the
16-bit data in which is transferred to the rd register. The content of the rb register is not altered.
The eight high-order bits of the rd register are set to 0.
(4) Delayed slot instruction
This instruction may be executed as a delayed slot instruction by writing it directly after
a branch instruction with the "d" bit. In this case, extension of the immediate by the ext
instruction cannot be performed.
Caution
The rb register and the displacement must specify a 16-bit boundary address (least significant bit =
0). Specifying an odd address causes an address misaligned interrupt. Note, however, that the data
transfer is performed by setting the least significant bit of the address to 0.
S1C17 CORE MANUAL
(Rev. 1.2)
rd(15:0) ← W[rb], rd(23:16) ← 0
9
8
7
6
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0
0
0
r d
0
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V
Z
N
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; memory address = rb
imm13
%rd,[%rb]
; memory address = rb + imm13
imm11
; imm11(10:0) = imm24(23:13)
imm13
; = imm24(12:0)
%rd,[%rb]
; memory address = rb + imm24
Seiko Epson Corporation
5
4
3
2
1
0
|
0
1
0
r b
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7 DETAILS OF INSTRUCTIONS
7-53

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