Ld.cf %Rd, %Rs - Epson S1C17 Series Manual

Cmos 16-bit single chip microcontroller
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ld.cf %rd, %rs

Function
Transfer data to the coprocessor and get the flag status
Standard)
Extension 1) Unusable
Extension 2) Unusable
15 14 13 12 11 10
Code
0
0
1
|
|
IL
IE
C
Flag
|
|
– ↔ ↔ ↔ ↔
Mode
Src: Register direct %rs = %r0 to %r7
Dst: Register direct %rd = %r0 to %r7
CLK
One cycle
Description
(1) Standard
ld.cf
Transfers data set in the rd and rs registers to the coprocessor and gets the flag status of the
coprocessor to the C, V, Z, and N flags in the PSR.
(2) Delayed slot instruction
This instruction may be executed as a delayed slot instruction by writing it directly after a
branch instruction with the "d" bit.
S1C17 CORE MANUAL
(Rev. 1.2)
co_dout0 ← rd, co_dout1 ← rs, psr(C, V, Z, N) ← co_cvzn
9
8
7
6
|
|
1
0
1
r d
0
|
|
|
|
|
V
Z
N
|
|
|
%rd,%rs
; co_dout0 data = rd, co_dout1 data = rs
Seiko Epson Corporation
5
4
3
2
1
0
|
0
0
1
r s
|
|
|
|
|
7 DETAILS OF INSTRUCTIONS
7-99

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